THIRUVALLUVAR UNIVERSITY PREVIOUS YEAR QUESTION PAPERS
Subject / Paper Name:
BECS63C
Subject / Paper Name:
MICROPROCESSOR ANS ITS APPLICATIONS
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Unit – 1 |
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Section – A [Two
Marks] |
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S. No |
Question |
Year |
|
01 |
Define Microprocessor Architecture. |
APR
/ MAY 2020 |
|
02 |
Mention the use of memory. |
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|
Section – B [Five
Marks] |
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|
01 |
Categorize the memory with appropriate sketch. |
APR
/ MAY 2020 |
|
02 |
Elucidate I/Os with 16-Bit Address in Memory – Mapped I/O. |
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SECTION – C [Ten
Marks] |
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|
01 |
Summarize in detail look at the 8085 MPU and its Architecture. |
APR
/ MAY 2020 |
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|
Unit – 2 |
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|
Section – A [Two
Marks] |
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S. No |
Question |
Year |
|
01 |
Denote Program. |
APR
/ MAY 2020 |
|
02 |
What is meant by counter? |
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Section – B [Five
Marks] |
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|
01 |
Analyse Data Transfer Operations with diagram. |
APR
/ MAY 2020 |
|
02 |
Examine Addition in Arithmetic Operations with example. |
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|
SECTION – C [Ten
Marks] |
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|
01 |
Characterize in detail about Timely Delay using one register with
its architecture. |
APR
/ MAY 2020 |
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|
Unit – 3 |
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|
Section – A [Two
Marks] |
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|
S. No |
Question |
Year |
|
01 |
What is Queue? |
APR
/ MAY 2020 |
|
02 |
Discuss: Flag Register. |
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|
Section – B [Five
Marks] |
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|
01 |
Paraphrase 8086 Internal Architecture with neat diagram. |
APR
/ MAY 2020 |
|
02 |
Translate in detail Segment Registers in Bus Interface Unit with
diagram. |
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|
SECTION – C [Ten
Marks] |
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|
01 |
Paraphrase in brief about the Execution Unit with neat diagram. |
APR
/ MAY 2020 |
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|
Unit – 4 |
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|
Section – A [Two
Marks] |
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|
S. No |
Question |
Year |
|
01 |
Examine Parity Flag. |
APR
/ MAY 2020 |
|
02 |
What do you mean macros? |
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|
Section – B [Five
Marks] |
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|
01 |
Point out in brief Repeat – Until Implementation with examples. |
APR
/ MAY 2020 |
|
02 |
Clear up in detail debugging Assembly Language Programs. |
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|
SECTION – C [Ten
Marks] |
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|
01 |
Clear Up in detail about the 8086 Unconditional Jump Instruction
with its Architecture. |
APR
/ MAY 2020 |
===================================================================
|
Unit – 5 |
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|
Section – A [Two
Marks] |
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|
S. No |
Question |
Year |
|
01 |
Define Control Registers. |
APR
/ MAY 2020 |
|
02 |
Denote Interrupt Request. |
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|
Section – B [Five
Marks] |
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|
01 |
Illustrate in detail about Block diagram of the 8255A Programmable
Peripheral Interface. |
APR
/ MAY 2020 |
|
02 |
Illuminate
in detail about the Block diagram of the 8254 Programmable Interval Timer. |
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|
SECTION – C [Ten
Marks] |
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|
01 |
Illuminate in brief Direct Memory Access and the 8237 DMA
Controller. |
APR
/ MAY 2020 |
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